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general description the max5223 contains two 8-bit, buffered, voltage out- put digital-to-analog converters (dac a and dac b) in a small 8-pin sot23 package. dac outputs can source and sink 1ma to within 100mv of ground and v dd . the max5223 operates with a single +2.7v to +5.5v supply. the device uses a 3-wire serial interface, which oper- ates at clock rates up to 25mhz and is compatible with spi, qspi, and microwire interface standards. the serial input shift register is 16 bits long and con- sists of 8 bits of dac input data and 8 bits for dac selection and shutdown control. dac registers can be loaded independently or in parallel at the positive edge of cs . the max5223? ultra-low power consumption and tiny 8-pin sot23 package make it ideal for portable and battery-powered applications. supply current is a low 100? and drops below 1? in shutdown mode. in addition, the reference input is disconnected from the ref pin during shutdown, which reduces the system? total power consumption. ________________________applications digital gain and offset adjustment programmable current source programmable voltage source power amp bias control vco tuning features tiny 8-pin sot23 package (3mm ? 3mm) low power consumption 100a operating current <1a shutdown current +2.7v to +5.5v single-supply operation dual buffered voltage output programmable shutdown mode 25mhz, 3-wire serial interface spi, qspi, and microwire-compatible max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 ________________________________________________________________ maxim integrated products 1 dac latch a dac a dac latch b dac b sclk outa outb din ref v dd 16-bit shift register control (8) data (8) max5223 83 1 5 6 7 4 0.1 f (optional) v outa v outb gnd 2 0.22 f cs functional diagram outb v dd outa sclk 1 2 8 7 din ref gnd cs max5223 top view 3 4 6 5 sot23-8 pin configuration 19-1895; rev 0; 1/01 part temp. range pin-package MAX5223EKA-T -40? to +85? 8 sot23 spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. ordering information for price, delivery, and to place orders, please contact maxim distribution at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd = +2.7v to +5.5v, ref = v dd , t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ............................................................. -0.3v to +6v all other pins to gnd (note 1).................. -0.3v to (v dd + 0.3v) continuous power dissipation (t a = +70?) 8-pin sot23 (derate 8.7mw/? above +70?)............696mw operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-65c to +150c lead temperature (soldering, 10s) .................................+300c parameter symbol conditions min typ max resolution n 8 ?.3 ? ?.2 ? ? 10 100 1 1 gnd v dd 25 816 50 0 ref 100 500 0.7 x v dd 0.3 x v dd 0.1 ?0 10 (note 4) v in = 0 or v dd i load = 0 (note 3) 2.7v v dd 3.6v, v ref = 2.4v, i load = 250? 4.5v v dd 5.5v, v ref = 4.096v, i load = 250? guaranteed monotonic, i load = 250? (note 2) i load = 250? (note 2) inl dnl tue v zs tc vzs psrr r ref v ih v il i in c in input capacitance input current input low voltage input high voltage output resistance capacitive load at out_ output voltage range reference input resistance (shutdown mode) reference input resistance reference input capacitance reference input voltage range power supply rejection ratio zero-code temperature coefficient zero-code offset total unadjusted error differential nonlinearity integral nonlinearity pf ? v v ? pf v m ? k ? pf v mv/v ?/? mv lsb lsb lsb bits units static performance reference input dac outputs digital inputs
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 _______________________________________________________________________________________ 3 note 1: the outputs may be shorted to v dd or gnd if the package power dissipation is not exceeded. typical short-circuit current to gnd is 70ma. note 2: reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. see typical operating characteristics . note 3: reference input resistance is code-dependent. the lowest input resistance occurs at code 55hex. see the reference input section. note 4: guaranteed by design. not production tested. electrical characteristics (continued) (v dd = +2.7v to +5.5v, ref = v dd , t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) timing characteristics (figure 3, v dd = +2.7v to +5.5v, t a = t min to t max , unless otherwise noted.) (note 4) v dd = +3.6v v dd = +5.5v 100 220 ? 150 275 all inputs = 0 i dd supply current 50 ? 0.6 v dd = +5.5v shutdown supply current v 2.7 5.5 v dd supply voltage range nv-s 0.25 all zeros to all ones digital feedthrough and crosstalk ? to 1 2 lsb, c l = 100pf voltage output settling time v/? 0.15 c l = 100pf sr voltage output slew rate parameter symbol min typ max units conditions serial interface timing conditions ns 50 t cspwh c s pulse width high ns 20 t cl sclk pulse width low ns 20 t ch sclk pulse width high ns 20 t dh din to sclk rise hold time ns 20 t ds din to sclk rise setup time units min typ max symbol parameter ns 50 t css ns 50 t csh sclk rise to c s rise setup time dynamic performance power supply c s fall to sclk rise setup time
0.04 0.08 0.06 0.12 0.10 0.16 0.14 0.18 -40 -10 5 -25 2035506580 positive supply current vs. temperature max5223 toc07 temperature ( c) i dd (ma) 0 0.3 0.2 0.1 0.4 0.5 0.6 0.7 0.8 0.9 1.0 2345 shutdown supply current vs. supply voltage max5223 toc08 supply voltage (v) i dd ( a) 5 -40 0.1 1 10 100 1k 10k reference small signal frequency response -35 -30 max5223 toc09 frequency (hz) relative output (db) -20 -25 -5 0 -10 -15 max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 4 _______________________________________________________________________________________ __________________________________________typical operating characteristics (v dd = +3v, t a = +25?, unless otherwise noted.) 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 0.001 0.1 0.01 1 10 100 output voltage vs. output source current max5223 toc01 output source current (ma) output voltage (v) -2.20 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 0 100 50 150 200 250 300 integral nonlinearity vs. digital code max5223 toc04 code inl (lsb) 0 2 1 4 3 5 6 0.0001 0.01 1 100 output voltage vs. output source current (v dd = +5v) max5223 toc02 output source current (ma) output voltage (v) -100 100 0 400 300 200 700 600 500 800 0.0001 0.01 0.001 0.1 1 10 output voltage vs. output sink current max5223 toc03 output sink current (ma) output voltage (mv) -0.10 -0.04 -0.06 -0.08 -0.02 0 0.02 0.04 0.06 0.08 0.10 0 100 50 150 200 250 300 differential nonlinearity vs. digital code max5223 toc05 code dnl (lsb) 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 23 4 5 positive supply current vs. supply voltage max5223 toc06 v dd (v) i dd (ma)
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 _______________________________________________________________________________________ 5 typical operating characteristics (continued) (v dd = +3v, t a = +25?, unless otherwise noted.) cs = high, sclk = 5mhz 50ns/div clock feedthrough max5223 toc11 ch1 ch2 sclk, 5mhz 0 to 3v 5v/div out_ 10mv/div ac-coupled power-up output glitch max5223 toc12 v dd = 0 to 5v rise time = fall time = 10 s v dd 2v/div out_ 50mv/div 100 s/div power-up output glitch max5223 toc13 v dd = 0 to 5v rise time = fall time = 1ms v dd 2v/div out_ 20mv/div 2ms/div large-signal output step response max5223 toc10 v ref = v dd = +3v r l = 10k ? , c l = 100pf cs 2v/div out_ 1v/div 10 s/div negative settling time max5223 toc14 v dd = ref = +3v r l = 10k ?, c l =100pf all data bits off to all data bits on cs 2v/div out_ 1v/div 4 s/div positive settling time max5223 toc15 v dd = ref = +3v r l = 10k ?, c l =100pf all data bits off to all data bits on cs 2v/div out_ 1v/div 4 s/div
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 6 _______________________________________________________________________________________ typical operating characteristics (continued) (v dd = +3v, t a = +25?, unless otherwise noted.) 2ms/div output voltage noise (dc to 1mhz) max5223 toc16 ch1 outa 2mv/div ac-coupled v dd = +3v, ref = v dd , no load, digital code = ff ______________________________________________________________pin description dac a output voltage (buffered) outa 5 dac b output voltage (buffered) outb 6 reference input for dac a and dac b (optional: bypass with 0.1? to gnd) ref 7 serial data input of the 16-bit shift register. data is clocked into the register on the rising edge of sclk. din 8 serial clock input sclk 4 positive power supply (+2.7v to +5.5v). bypass with 0.22? to gnd. v dd 3 pin ground gnd 2 chip select. active-low. enables data to be shifted into the 16-bit shift register. programming commands are executed at the rising edge of c s . c s 1 function name
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 _______________________________________________________________________________________ 7 detailed description analog section the max5223 contains two 8-bit, voltage output dacs. the dacs are ?nverted?r-2r ladder networks. they use complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in propor- tion to the applied reference voltage. the max5223 has one reference input that is shared by dac a and dac b. the device includes output buffer amplifiers for both dacs and input logic for sim- ple microprocessor (?) and cmos interfaces. the power supply range is from +5.5v down to +2.7v. reference input and dac output range the voltage at ref sets the full-scale output of the dacs. the input impedance of the ref input is code- dependent. the lowest value, approximately 8k ? , occurs when the input code is 01010101 (55hex). the typical value of 50m ? occurs when the input code is zero. in shutdown mode, the selected dac output is set to zero, while the value stored in the dac register remains unchanged. this removes the load from the reference input to save power. bringing the max5223 out of shut- down mode restores the dac output voltage. since the input resistance at ref is code-dependent, the dac? reference source should have an output impedance of no more than 5 ? to meet accuracy specifications and to avoid crosstalk. the input capacitance at the ref pin is also code dependent and typically does not exceed 25pf. the reference voltage on ref can range anywhere from gnd to v dd . see the output buffer amplifier section for more information. figure 1 is the dac simplified circuit diagram. output buffer amplifiers dac a and dac b voltage outputs are internally buffered. the buffer amplifiers have a rail-to-rail (gnd to v dd ) output voltage range. both dac output amplifiers can source and sink up to 1ma of current. the amplifiers are unity-gain stable with a capacitive load of 100pf or smaller. the slew rate is typically 0.15v/?. shutdown mode when programmed to shutdown mode, the outputs of dac a and dac b are passively pulled to gnd with a series 5k ? resistor. in shutdown mode, the ref input is high impedance (50m ? typ) to conserve current drain from the system reference; therefore, the system refer- ence does not have to be powered down. coming out of shutdown, the dac outputs return to the values kept in the registers. the recovery time is equiv- alent to the dac settling time. serial interface an active low chip select ( c s ) enables the shift register to receive data from the serial data input. data is clocked into the shift register on every rising edge of the serial clock signal (sclk). the clock frequency can be as high as 25mhz. data is sent by the most significant bit (msb) first and can be transmitted in one 16-bit word. the write cycle can be segmented when c s is kept active (low) to allow, for example, two 8-bit wide transfers. after clock- ing all 16 bits into the input shift register, the rising edge of c s updates the dac outputs and the shut- down status. dacs cannot be simultaneously updated to different digital values because of their single buffered structure. serial input data format and control codes table 1 lists the serial input data format and table 2 lists the programming commands. the 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. the 8-bit control byte is not decoded internally. every control bit performs one function. data is clocked rail-to-rail is a registered trademark of nippon motorola, ltd. figure 1. dac simplified circuit diagram 2r 2r 2r 2r 2r rrr ref gnd out shown for all ones on dac
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 8 _______________________________________________________________________________________ in starting with ub1 (uncommitted bit), followed by the remaining control bits and the data byte. the least sig- nificant bit (lsb) of the data byte (d0) is the last bit clocked into the shift register (figure 2). table 3 is an example of a 16-bit input word. it per- forms the following functions: 80 hex (128 decimal) loaded into dac registers a and b. dac a and dac b are active. table 4 shows code examples and how to calculate their corresponding outputs. *clocked in last **clocked in first uncommitted bit 1 ub1** uncommitted bit 2 ub2 uncommitted bit 3 ub3 shutdown, active-high sb shutdown, active-high sa uncommitted bit 4 ub4 load reg dac b, active-high lb load reg dac a, active-high la dac data bit 7 (msb) d7 dac data bit 6 d6 dac data bit 5 d5 dac data bit 4 d4 dac data bit 3 d3 dac data bit 2 d2 dac data bit 1 d1 dac data bit 0 (lsb) d0* table 1. input shift register din sclk cs ub1 ub2 ub3 sb sa ub4 lb la d7 d6 d5 d4 d3 d2 d1 d0 optional (control byte) (data byte) instruction executed figure 2. 3-wire serial-interface timing diagram data bits control bits
max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 _______________________________________________________________________________________ 9 table 2. serial-interface programming commands table 3. example of a 16-bit input word x = don? care. * = not shown, for the sake of clarity. the functions of loading and shutting down the dacs and programming the logic can be co mbined in a single command. control data function d0 lsb d1 d2 d3 d4 d5 d6 d7 msb la lb ub4 sa sb ub3 ub2 ub1 x x 1 * * 0 0 0 x x x x x x x x no operation to dac registers unassigned command load register to dac b load register to dac a load both dac registers all dacs active unassigned command shutdown shutdown shutdown x x x x x x x x x x x x x x x 8-bit dac data 8-bit dac data 8-bit dac data x x x x x x x x x x x x x x x x x x x x x x x x x * * * * * 1 1 0 0 0 1 0 1 * * * * * 0 0 0 0 0 0 0 0 0 * * * * 0 0 0 1 1 * * * * 0 0 1 0 1 1 1 1 1 1 1 1 1 1 x x x x x x x x x x x x x x x x x x loaded loaded in first in last ub1 ub2 x x ub3 1 sb 0 sa 0 ub4 0 lb 1 la 1 d7 1 d6 0 d5 0 d4 0 d3 0 d2 0 d1 0 d0 0 digital inputs the digital inputs are compatible with cmos logic. supply current increases slightly when toggling the logic inputs through the transition zone between 0.3 ? v dd and 0.7 ? v dd . microprocessor interfacing the max5223 serial interface is compatible with microwire, spi, and qspi. for spi, clear the cpol and cpha bits (cpol = 0 and cpha = 0). cpol = 0 sets the inactive clock state to zero, and cpha = 0 changes data at the falling edge of sclk. this setting allows spi to run at full clock speeds. if a serial port is not available on your ?, three bits of a parallel port can be used to emulate a serial port by bit manipulation. minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary.
applications information the max5223 is specified for single-supply operation with v dd ranging from +2.7v to +5.5v, covering all commonly used supply voltages in +3v and +5v sys- tems. initialization an internal por circuit forces the outputs to zero scale and initializes all internal registers to zero. perform an initial write operation to set the outputs to the desired voltage at power-up. power-supply and ground management gnd should be connected to the highest quality ground available. bypass v dd with a 0.1? to 0.22? capacitor to gnd. the reference input can be used without bypassing. for optimum line- and load-transient response and noise performance, bypass the reference input with 0.1? to 4.7? to gnd. careful pc board lay- out minimizes crosstalk among dac outputs, the refer- ence, and digital inputs. separate analog lines with ground traces between them. make sure that high-fre- quency digital lines are not routed in parallel to analog lines. max5223 low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 10 ______________________________________________________________________________________ 12 1 256 256 8 lsb ref ref analog output ref d == = ? ? ? ? ? ? ? ? ? ? ? ? ? table 4. code table 0v 0 0 0 0 0 0 0 0 + ? ? ? ? ? ? ref 1 256 1 0 0 0 0 0 0 0 + ? ? ? ? ? ? ref 127 256 1 1 1 1 1 1 1 0 + ? ? ? ? ? ? =+ ref ref 128 256 2 0 0 0 0 0 0 0 1 + ? ? ? ? ? ? ref 129 256 1 0 0 0 0 0 0 1 + ? ? ? ? ? ? ref 255 256 1 1 1 1 1 1 1 1 analog output d0 d1 d2 d3 d4 d5 d6 d7 dac contents note: where d = decimal value of digital input chip information transistor count: 1480 process technology: bicmos cs sclk din t ds t dh t cl t ch t css t cspwh t csh figure 3. detailed serial-interface timing diagram
________________________________________________________package information maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 _____________________ 11 2001 maxim integrated products printed usa is a registered trademark of maxim integrated products. sot23, 8l.eps low-power, dual, 8-bit, voltage output serial dac in 8-pin sot23 max5223

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